Intel® StrongARM® SA-110 Microprocessor Spurious Reset Application Note

The Intel(R) StrongARM(R) SA-110 Microprocessor Spurious Reset Application Note describes the noise sensitivity in some applications in the StrongARM(R) SA-110 Microprocessor and its 21285 core logic configuration. This can occur when the data bus enable (DBE) signal from the 21285 simultaneously tristates the data bus while the SA-110 is driving the majority of the data lines high. Depending on the system implementation, this noise sensitivity can result in a spurious reset. This application note recommends a delay circuit that is intended to function at all bus speeds.

File Name/Size:
53262 bytes
Download From:
U.S. FTP Server (Download within North America)
Mirror FTP Sites (Download from international areas)
U.S. Web Server (Available for byte serving)