diff -urN linux-2.4.1-rmk1-np1/arch/arm/mach-sa1100/Makefile linux/arch/arm/mach-sa1100/Makefile --- linux-2.4.1-rmk1-np1/arch/arm/mach-sa1100/Makefile Mon Feb 12 15:08:48 2001 +++ linux/arch/arm/mach-sa1100/Makefile Mon Feb 12 09:49:56 2001 @@ -16,7 +16,7 @@ obj-n := obj- := -export-objs := hw.o dma-sa1100.o dma-sa1111.o leds.o hwtimer.o +export-objs := hw.o dma-sa1100.o dma-sa1111.o leds.o hwtimer.o obj-$(CONFIG_SA1111) += dma-sa1111.o obj-$(CONFIG_LEDS) += leds.o @@ -24,6 +24,7 @@ obj-$(CONFIG_APM) += apm.o obj-$(CONFIG_SA1100_USB) += sa1100_usbd.o obj-$(CONFIG_PROFILER) += hwtimer.o +obj-$(CONFIG_PM) += power.o suspend.o obj-$(CONFIG_SA1100_USB) += sa1100_usbd.o sa1100_usbd-objs := usb_ctl.o usb_ep0.o usb_recv.o usb_send.o diff -urN linux-2.4.1-rmk1-np1/arch/arm/mach-sa1100/apm.c linux/arch/arm/mach-sa1100/apm.c --- linux-2.4.1-rmk1-np1/arch/arm/mach-sa1100/apm.c Mon Feb 12 15:08:48 2001 +++ linux/arch/arm/mach-sa1100/apm.c Mon Feb 12 15:01:17 2001 @@ -32,6 +32,8 @@ #include #include +#include +#include #ifdef CONFIG_MAGIC_SYSRQ extern void (*sysrq_power_off)(void); @@ -199,11 +201,28 @@ } } #endif + +#ifdef CONFIG_SA1100_ACCELENT + // FIXME do we need to debounce?? + if (machine_is_accelent_sa()) { + if ((GPLR & 0x1) == 0) { + printk(__FUNCTION__ ": power button\n"); + *event = APM_USER_SUSPEND; + } + } +#endif return APM_SUCCESS; } + static int set_power_state(u_short what, u_short state) { + if (state == APM_STATE_SUSPEND) + { + printk("*** whee here we go into suspend\n"); + sa1110_suspend(); + send_event(APM_CRITICAL_RESUME); + } return APM_SUCCESS; } @@ -459,6 +478,8 @@ { int err; struct apm_user *as; + + printk("*** suspend()\n"); get_time_diff(); cli(); diff -urN linux-2.4.1-rmk1-np1/arch/arm/mach-sa1100/power.c linux/arch/arm/mach-sa1100/power.c --- linux-2.4.1-rmk1-np1/arch/arm/mach-sa1100/power.c Wed Dec 31 19:00:00 1969 +++ linux/arch/arm/mach-sa1100/power.c Mon Feb 12 15:00:56 2001 @@ -0,0 +1,145 @@ +/* + * SA1110 Power Management Routines + * + * Copyright (c) 2001 Cliff Brake + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License. + * + * History: + * + * 2001-02-06: Cliff Brake Initial code + * + */ + +/* + * Debug macros + */ +#define DEBUG 1 +#ifdef DEBUG +# define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args) +#else +# define DPRINTK(fmt, args...) +#endif + + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +/* + * FIXME eventually we want to dynamically allocate sleep_param + */ + +static unsigned long sleep_param[SLEEP_PARAM_SIZE]; + +void resume_return(void); + +int sa1110_suspend(void) +{ + + /* set up pointer to sleep parameters */ + sleep_param_p = &sleep_param[0]; + + DPRINTK("*** sa1100_suspend()\n"); + DPRINTK("*** &sleep_param[0] = 0x%08x\n", sleep_param_p); + DPRINTK("*** resume_return() = 0x%08x\n", &resume_return); + + + + + /* disable interrupts */ + cli(); + + /* save interrupt registers */ + sleep_param[SLEEP_PARAM_ICMR] = ICMR; + sleep_param[SLEEP_PARAM_GRER] = GRER; + sleep_param[SLEEP_PARAM_GFER] = GFER; + + /* set wake up sources */ + if (machine_is_accelent_sa()) { +#ifdef CONFIG_SA1100_ACCELENT + PWER = 0x1; + GRER = 0x1; + GFER = 0x1; + GEDR = 0x1; +#endif + } + + cpu_sa1110_do_suspend(sleep_param_p); + + DPRINTK("*** made it back from resume\n"); + + ICMR = sleep_param[SLEEP_PARAM_ICMR]; + GRER = sleep_param[SLEEP_PARAM_GRER]; + GFER = sleep_param[SLEEP_PARAM_GFER]; + + OSMR0 = 0; /* set initial match at 0 */ + OSSR = 0xf; /* clear status on all timers */ + OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */ + OSCR = 0; /* initialize free-running timer, force first match */ + + sti(); + + + + return 0; +} + +static int pm_do_suspend(ctl_table *ctl, int write, struct file *file, void *buffer, size_t *len) +{ + int retval; + + DPRINTK("yea\n"); + + retval = pm_send_all(PM_SUSPEND, (void *)2); + if (retval) + return retval; + + retval = sa1110_suspend(); + + retval = pm_send_all(PM_RESUME, (void *)0); + if (retval) + return retval; + + return 0; +} + + +static struct ctl_table pm_table[] = +{ + {ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, &pm_do_suspend}, + {0} +}; + +static struct ctl_table pm_dir_table[] = +{ + {CTL_ACPI, "pm", NULL, 0, 0555, pm_table}, + {0} +}; + +/* + * Initialize power interface + */ +static int __init pm_init(void) +{ + register_sysctl_table(pm_dir_table, 1); + return 0; +} + +__initcall(pm_init); + + + + + + + + diff -urN linux-2.4.1-rmk1-np1/arch/arm/mach-sa1100/suspend.S linux/arch/arm/mach-sa1100/suspend.S --- linux-2.4.1-rmk1-np1/arch/arm/mach-sa1100/suspend.S Wed Dec 31 19:00:00 1969 +++ linux/arch/arm/mach-sa1100/suspend.S Mon Feb 12 14:53:17 2001 @@ -0,0 +1,380 @@ + +/* + * SA1110 Assembler Power Management Routines + * + * Copyright (c) 2001 Cliff Brake + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License. + * + * History: + * + * 2001-12-06: Cliff Brake Initial code + * + */ + +#include +#include +#include +#include + +/* + * cpu_sa1110_do_suspend() + * + * Causes sa1110 to enter sleep state + * + */ + +ENTRY(sleep_param_p) + .long 0x00000000 + +ENTRY(cpu_sa1110_do_suspend) + @ save registers on stack + stmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, lr} + + @ load address of sleep_param + @ and then load contents of pointer + adr r0, sleep_param_p + ldr r0, [r0] + + @ save cpsr + mrs r1, cpsr + str r1, [r0, #(SLEEP_PARAM_CPSR*4)] + + @ save real address of resume_return in PSPR (scratch register) + @ this happens to be the same as the virtual address + ldr r1, =PSPR + adr r2, resume_return + str r2, [r1] + + @ save register for all modes + @ we are currently in SVC mode + str r13, [r0, #(SLEEP_PARAM_SVC_R13*4)] + str r14, [r0, #(SLEEP_PARAM_SVC_R14*4)] + mrs r1, spsr + str r1, [r0, #(SLEEP_PARAM_SVC_SPSR*4)] + + @ usr mode + mrs r3, cpsr @ save for later + bic r1, r3, #0x1F + orr r1, r1, #0xDF + msr cpsr, r1 + str r13, [r0, #(SLEEP_PARAM_USER_R13*4)] + str r14, [r0, #(SLEEP_PARAM_USER_R14*4)] + + @ abort mode + mrs r1, cpsr + bic r1, r1, #0x1F + orr r1, r1, #0xD7 + msr cpsr, r1 + str r13, [r0, #(SLEEP_PARAM_ABORT_R13*4)] + str r14, [r0, #(SLEEP_PARAM_ABORT_R14*4)] + mrs r1, spsr + str r1, [r0, #(SLEEP_PARAM_ABORT_SPSR*4)] + + @ undef mode + mrs r1, cpsr + bic r1, r1, #0x1F + orr r1, r1, #0xDB + msr cpsr, r1 + str r13, [r0, #(SLEEP_PARAM_UNDEF_R13*4)] + str r14, [r0, #(SLEEP_PARAM_UNDEF_R14*4)] + mrs r1, spsr + str r1, [r0, #(SLEEP_PARAM_UNDEF_SPSR*4)] + + @ irq mode + mrs r1, cpsr + bic r1, r1, #0x1F + orr r1, r1, #0xD2 + msr cpsr, r1 + str r13, [r0, #(SLEEP_PARAM_IRQ_R13*4)] + str r14, [r0, #(SLEEP_PARAM_IRQ_R14*4)] + mrs r1, spsr + str r1, [r0, #(SLEEP_PARAM_IRQ_SPSR*4)] + + @ fiq mode + mrs r1, cpsr + bic r1, r1, #0x1F + orr r1, r1, #0xD1 + msr cpsr, r1 + str r8, [r0, #(SLEEP_PARAM_FIQ_R8*4)] + str r9, [r0, #(SLEEP_PARAM_FIQ_R9*4)] + str r10, [r0, #(SLEEP_PARAM_FIQ_R10*4)] + str r11, [r0, #(SLEEP_PARAM_FIQ_R11*4)] + str r12, [r0, #(SLEEP_PARAM_FIQ_R12*4)] + str r13, [r0, #(SLEEP_PARAM_FIQ_R13*4)] + str r14, [r0, #(SLEEP_PARAM_IRQ_R14*4)] + mrs r1, spsr + str r1, [r0, #(SLEEP_PARAM_IRQ_SPSR*4)] + + @ go back to svc mode + mrs r1, cpsr + bic r1, r1, #0x1F + orr r1, r1, #0xD3 + msr cpsr, r1 + + @ save coprocessor registers + mrc p15, 0, r1, c1, c0, 0 + str r1, [r0, #(SLEEP_PARAM_CP15_R1*4)] + mrc p15, 0, r1, c2, c0, 0 + str r1, [r0, #(SLEEP_PARAM_CP15_R2*4)] + mrc p15, 0, r1, c3, c0, 0 + str r1, [r0, #(SLEEP_PARAM_CP15_R3*4)] + mrc p15, 0, r1, c5, c0, 0 + str r1, [r0, #(SLEEP_PARAM_CP15_R5*4)] + mrc p15, 0, r1, c6, c0, 0 + str r1, [r0, #(SLEEP_PARAM_CP15_R6*4)] + mrc p15, 0, r1, c13, c0, 0 + str r1, [r0, #(SLEEP_PARAM_CP15_R13*4)] + + @ clean data cache and invalidate WB + bl cpu_sa1100_cache_clean_invalidate_all + + @ disable clock switching + mcr p15, 0, r1, c15, c2, 2 + + @ save address of sleep_param in r4 + mov r0, r4 + + @ delay 90us and set CPU PLL to lowest speed + @ fixes resume problem on high speed SA1110 + mov r0, #90 + bl SYMBOL_NAME(udelay) + ldr r0, =PPCR + mov r1, #0 + str r1, [r0] + mov r0, #90 + bl SYMBOL_NAME(udelay) + + +/* setup up register contents for jump to page containing SA1110 SDRAM controller bug fix suspend code + * + * r0 points to MSC0 register + * r1 points to MSC1 register + * r2 points to MSC2 register + * r3 is MSC0 value + * r4 is MSC1 value + * r5 is MSC2 value + * r6 points to MDREFR register + * r7 is first MDREFR value + * r8 is second MDREFR value + * r9 is pointer to MDCNFG register + * r10 is MDCNFG value + * r11 is third MDREFR value + * r12 is pointer to PMCR register + * r13 is PMCR value (1) + * + */ + + ldr r0, =MSC0 + ldr r1, =MSC1 + ldr r2, =MSC2 + + ldr r3, [r0] + bic r3, r3, #((1<<17)|(1<<16)) + bic r3, r3, #((1<<1)|(1<<0)) + + ldr r4, [r1] + bic r4, r4, #((1<<17)|(1<<16)) + bic r4, r4, #((1<<1)|(1<<0)) + + ldr r5, [r2] + bic r5, r5, #((1<<17)|(1<<16)) + bic r5, r5, #((1<<1)|(1<<0)) + + ldr r6, =MDREFR + + ldr r7, [r6] + bic r7, r7, #((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)) + bic r7, r7, #((1<<9)|(1<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<4)) + orr r8, r7, #(1<<31) + + ldr r9, =MDCNFG + ldr r10, [r6] + bic r10, r10, #((1<<17)|(1<<16)) + bic r10, r10, #((1<<1)|(1<<0)) + + @mov r10, #0 + + bic r11, r8, #(1<<31) + bic r11, r11, #(1<<20) + + ldr r12, =PMCR + + mov r13, #1 + + b sa1110_sdram_controller_fix + + .align 5 +sa1110_sdram_controller_fix: + + @ Step 1 clear RT field of all MSCx registers + str r3, [r0] + str r4, [r1] + str r5, [r2] + + @ Step 2 clear DRI field in MDREFR + str r7, [r6] + + @ Step 3 set SLFRSH bit in MDREFR + str r8, [r6] + + @ Step 4 clear DE bis in MDCNFG + str r10, [r9] + + @ Step 5 clear DRAM refresh control register + str r11, [r6] + + @ Wow, now the hardware suspend request pins can be used, that makes them functional for + @ about 7 ns out of the entire time that the CPU is running! + + @ Step 6 set force sleep bit in PMCR + + str r13, [r12] + +20: + b 20b @ loop waiting for sleep + +/* + * resume_return() + * + * entry point from bootloader into kernel during resume + * + */ + + .align 5 +ENTRY(resume_return) + + @ load address of sleep_param into r0 + adr r0, sleep_param_p + ldr r0, [r0] + + @ restore cp15_r3, domain id + ldr r1, [r0, #(SLEEP_PARAM_CP15_R3*4)] + mcr p15, 0, r1, c3, c0 ,0 + + @ restore cp15_r2, translation table base address + ldr r1, [r0, #(SLEEP_PARAM_CP15_R2*4)] + mcr p15, 0, r1, c2, c0 ,0 + + mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs + mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache + + @ get saved cp15 r1 (control register) + ldr r1, [r0, #(SLEEP_PARAM_CP15_R1*4)] + + @ get address to jump to after turning on MMU + adr r2, resume_after_mmu + + cmp r2, #0 + + b resume_turn_on_mmu + + .align 5 +resume_turn_on_mmu: + + @ turn on mmu + mcr p15, 0, r1, c1, c0 ,0 + + @ jump to resume_after_mmu + mov pc, r2 + nop + nop + + .align 5 +resume_after_mmu: + + mov r1, #0 + mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs + mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache + + @ for SA1110 and Linux, the virtual address + @ just happens to equal the physical address for sleep_param + @ how convenient + + ldr r1, [r0, #(SLEEP_PARAM_CP15_R13*4)] + mcr p15, 0, r1, c13, c0, 0 + + @ Restore the rest of the CPU state + + @ svc + ldr r13, [r0, #(SLEEP_PARAM_SVC_R13*4)] + ldr r14, [r0, #(SLEEP_PARAM_SVC_R14*4)] + ldr r1, [r0, #(SLEEP_PARAM_SVC_SPSR*4)] + msr spsr, r1 + + @ usr + mrs r1, cpsr + bic r1, r1, #0x1F + orr r1, r1, #0xDF + msr cpsr, r1 + ldr r13, [r0, #(SLEEP_PARAM_USER_R13*4)] + ldr r14, [r0, #(SLEEP_PARAM_USER_R14*4)] + + @ abort + mrs r1, cpsr + bic r1, r1, #0x1F + orr r1, r1, #0xD7 + msr cpsr, r1 + ldr r13, [r0, #(SLEEP_PARAM_ABORT_R13*4)] + ldr r14, [r0, #(SLEEP_PARAM_ABORT_R14*4)] + ldr r1, [r0, #(SLEEP_PARAM_ABORT_SPSR*4)] + msr spsr, r1 + + @ undef + mrs r1, cpsr + bic r1, r1, #0x1F + orr r1, r1, #0xDB + msr cpsr, r1 + ldr r13, [r0, #(SLEEP_PARAM_UNDEF_R13*4)] + ldr r14, [r0, #(SLEEP_PARAM_UNDEF_R14*4)] + ldr r1, [r0, #(SLEEP_PARAM_UNDEF_SPSR*4)] + msr spsr, r0 + + @ irq + mrs r1, cpsr + bic r1, r1, #0x1F + orr r1, r1, #0xD2 + msr cpsr, r1 + ldr r13, [r0, #(SLEEP_PARAM_IRQ_R13*4)] + ldr r14, [r0, #(SLEEP_PARAM_IRQ_R14*4)] + ldr r1, [r0, #(SLEEP_PARAM_IRQ_SPSR*4)] + msr spsr, r1 + + @ fiq + mrs r1, cpsr + bic r1, r1, #0x1F + orr r1, r1, #0xD1 + msr cpsr, r1 + ldr r8, [r0, #(SLEEP_PARAM_FIQ_R8*4)] + ldr r9, [r0, #(SLEEP_PARAM_FIQ_R9*4)] + ldr r10, [r0, #(SLEEP_PARAM_FIQ_R10*4)] + ldr r11, [r0, #(SLEEP_PARAM_FIQ_R11*4)] + ldr r12, [r0, #(SLEEP_PARAM_FIQ_R12*4)] + ldr r13, [r0, #(SLEEP_PARAM_FIQ_R13*4)] + ldr r14, [r0, #(SLEEP_PARAM_FIQ_R14*4)] + ldr r1, [r0, #(SLEEP_PARAM_FIQ_SPSR*4)] + msr spsr, r1 + + @ switch to svc mode + mrs r1, cpsr + bic r1, r1, #0x1F + orr r1, r1, #0xD3 + msr cpsr, r1 + + @ Restore rest of Coprocessor state + ldr r1, [r0, #(SLEEP_PARAM_CP15_R5*4)] + mcr p15, 0, r1, c5, c0 ,0 + + ldr r1, [r0, #(SLEEP_PARAM_CP15_R6*4)] + mcr p15, 0, r1, c6, c0 ,0 + + @ restore cpsr + ldr r1, [r0, #(SLEEP_PARAM_CPSR*4)] + msr cpsr, r1 + + @ return to caller + ldmfd sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, lr} + mov pc, lr + + diff -urN linux-2.4.1-rmk1-np1/include/asm-arm/arch-sa1100/power.h linux/include/asm-arm/arch-sa1100/power.h --- linux-2.4.1-rmk1-np1/include/asm-arm/arch-sa1100/power.h Wed Dec 31 19:00:00 1969 +++ linux/include/asm-arm/arch-sa1100/power.h Mon Feb 12 11:24:29 2001 @@ -0,0 +1,72 @@ +/* + * suspend defines + * + */ + + +#define SLEEP_PARAM_USER_R0 0 +#define SLEEP_PARAM_USER_R1 1 +#define SLEEP_PARAM_USER_R2 2 +#define SLEEP_PARAM_USER_R3 3 +#define SLEEP_PARAM_USER_R4 4 +#define SLEEP_PARAM_USER_R5 5 +#define SLEEP_PARAM_USER_R6 6 +#define SLEEP_PARAM_USER_R7 7 +#define SLEEP_PARAM_USER_R8 8 +#define SLEEP_PARAM_USER_R9 9 +#define SLEEP_PARAM_USER_R10 10 +#define SLEEP_PARAM_USER_R11 11 +#define SLEEP_PARAM_USER_R12 12 +#define SLEEP_PARAM_USER_R13 13 +#define SLEEP_PARAM_USER_R14 14 + +#define SLEEP_PARAM_PC 15 + +#define SLEEP_PARAM_SVC_R13 16 +#define SLEEP_PARAM_SVC_R14 17 + +#define SLEEP_PARAM_ABORT_R13 18 +#define SLEEP_PARAM_ABORT_R14 19 + +#define SLEEP_PARAM_UNDEF_R13 20 +#define SLEEP_PARAM_UNDEF_R14 21 + +#define SLEEP_PARAM_IRQ_R13 22 +#define SLEEP_PARAM_IRQ_R14 23 + +#define SLEEP_PARAM_FIQ_R8 24 +#define SLEEP_PARAM_FIQ_R9 25 +#define SLEEP_PARAM_FIQ_R10 26 +#define SLEEP_PARAM_FIQ_R11 27 +#define SLEEP_PARAM_FIQ_R12 28 +#define SLEEP_PARAM_FIQ_R13 29 +#define SLEEP_PARAM_FIQ_R14 30 + +#define SLEEP_PARAM_CPSR 31 +#define SLEEP_PARAM_SVC_SPSR 32 +#define SLEEP_PARAM_ABORT_SPSR 33 +#define SLEEP_PARAM_UNDEF_SPSR 34 +#define SLEEP_PARAM_IRQ_SPSR 35 +#define SLEEP_PARAM_FIQ_SPSR 36 + +#define SLEEP_PARAM_CP15_R1 37 +#define SLEEP_PARAM_CP15_R2 38 +#define SLEEP_PARAM_CP15_R3 39 +#define SLEEP_PARAM_CP15_R5 40 +#define SLEEP_PARAM_CP15_R6 41 +#define SLEEP_PARAM_CP15_R13 42 + +#define SLEEP_PARAM_ICMR 43 +#define SLEEP_PARAM_GRER 44 +#define SLEEP_PARAM_GFER 45 + +#define SLEEP_PARAM_SIZE (SLEEP_PARAM_GFER + 1) + + +#ifndef __ASSEMBLY__ + +int sa1100_suspend(void); +extern unsigned long sleep_param_p; + +#endif + diff -urN linux-2.4.1-rmk1-np1/drivers/video/sa1100fb.c linux/drivers/video/sa1100fb.c --- linux-2.4.1-rmk1-np1/drivers/video/sa1100fb.c Thu Feb 8 16:17:24 2001 +++ linux/drivers/video/sa1100fb.c Thu Feb 8 16:14:34 2001 @@ -71,6 +71,10 @@ * 2000-11-23 * Freebird add * Eric Peng + * + * 2001-02-07: + * Added PM callback + * Cliff Brake */ #include @@ -87,6 +91,7 @@ #include #include #include +#include #include #include @@ -137,6 +142,11 @@ #define SA1100_NAME "SA1100" #define NR_MONTYPES 1 + +#ifdef CONFIG_PM +static struct pm_dev *fb_pm_dev; +#endif + static inline void sa1100fb_assabet_set_truecolor(u_int is_true_color) { @@ -1288,6 +1298,7 @@ { u_long flags; + DPRINTK("__FUNCTION__\n"); local_irq_save(flags); /* Disable controller before changing parameters */ @@ -1426,6 +1437,24 @@ return 0; } +#ifdef CONFIG_PM +static int sa1100fb_pm_callback(struct pm_dev *pm_dev, pm_request_t req, void *data) +{ + DPRINTK("req = %d\n", req); + switch (req) { + case PM_SUSPEND: + sa1100fb_disable_lcd_controller(); + while(current_par.controller_state != LCD_MODE_DISABLED); + break; + case PM_RESUME: + sa1100fb_enable_lcd_controller(); + break; + } + DPRINTK("returning\n"); + return 0; +} +#endif + int __init sa1100fb_init(void) { @@ -1485,6 +1514,9 @@ sa1100fb_decode_var(&init_var, ¤t_par); register_framebuffer(&fb_info); +#ifdef CONFIG_PM + fb_pm_dev = pm_register(PM_SYS_DEV, 0, sa1100fb_pm_callback); +#endif /* This driver cannot be unloaded at the moment */ MOD_INC_USE_COUNT; diff -urN linux-2.4.1-rmk1-np1/include/asm-arm/arch-sa1100/SA-1100.h linux/include/asm-arm/arch-sa1100/SA-1100.h --- linux-2.4.1-rmk1-np1/include/asm-arm/arch-sa1100/SA-1100.h Mon Feb 12 15:13:20 2001 +++ linux/include/asm-arm/arch-sa1100/SA-1100.h Mon Feb 12 15:43:26 2001 @@ -504,6 +504,32 @@ #define Ser3UTSR1 /* Ser. port 3 UART Status Reg. 1 */ \ (*((volatile Word *) io_p2v (_Ser3UTSR1))) +#elif LANGUAGE == Assembly +#define Ser1UTCR0 ( io_p2v (_Ser1UTCR0)) +#define Ser1UTCR1 ( io_p2v (_Ser1UTCR1)) +#define Ser1UTCR2 ( io_p2v (_Ser1UTCR2)) +#define Ser1UTCR3 ( io_p2v (_Ser1UTCR3)) +#define Ser1UTDR ( io_p2v (_Ser1UTDR)) +#define Ser1UTSR0 ( io_p2v (_Ser1UTSR0)) +#define Ser1UTSR1 ( io_p2v (_Ser1UTSR1)) + +#define Ser2UTCR0 ( io_p2v (_Ser2UTCR0)) +#define Ser2UTCR1 ( io_p2v (_Ser2UTCR1)) +#define Ser2UTCR2 ( io_p2v (_Ser2UTCR2)) +#define Ser2UTCR3 ( io_p2v (_Ser2UTCR3)) +#define Ser2UTCR4 ( io_p2v (_Ser2UTCR4)) +#define Ser2UTDR ( io_p2v (_Ser2UTDR)) +#define Ser2UTSR0 ( io_p2v (_Ser2UTSR0)) +#define Ser2UTSR1 ( io_p2v (_Ser2UTSR1)) + +#define Ser3UTCR0 ( io_p2v (_Ser3UTCR0)) +#define Ser3UTCR1 ( io_p2v (_Ser3UTCR1)) +#define Ser3UTCR2 ( io_p2v (_Ser3UTCR2)) +#define Ser3UTCR3 ( io_p2v (_Ser3UTCR3)) +#define Ser3UTDR ( io_p2v (_Ser3UTDR)) +#define Ser3UTSR0 ( io_p2v (_Ser3UTSR0)) +#define Ser3UTSR1 ( io_p2v (_Ser3UTSR1)) + #endif /* LANGUAGE == C */ #define UTCR0_PE 0x00000001 /* Parity Enable */ @@ -1231,6 +1257,17 @@ (*((volatile Word *) io_p2v (_PGSR))) #define POSR /* PM Oscillator Status Reg. */ \ (*((volatile Word *) io_p2v (_POSR))) + +#elif LANGUAGE == Assembly +#define PMCR (io_p2v (_PMCR)) +#define PSSR (io_p2v (_PSSR)) +#define PSPR (io_p2v (_PSPR)) +#define PWER (io_p2v (_PWER)) +#define PCFR (io_p2v (_PCFR)) +#define PPCR (io_p2v (_PPCR)) +#define PGSR (io_p2v (_PGSR)) +#define POSR (io_p2v (_POSR)) + #endif /* LANGUAGE == C */ #define PMCR_SF 0x00000001 /* Sleep Force (set only) */ @@ -1483,6 +1520,17 @@ (*((volatile Word *) io_p2v (_GEDR))) #define GAFR /* GPIO Alternate Function Reg. */ \ (*((volatile Word *) io_p2v (_GAFR))) +#elif LANGUAGE == Assembly + +#define GPLR (io_p2v (_GPLR)) +#define GPDR (io_p2v (_GPDR)) +#define GPSR (io_p2v (_GPSR)) +#define GPCR (io_p2v (_GPCR)) +#define GRER (io_p2v (_GRER)) +#define GFER (io_p2v (_GFER)) +#define GEDR (io_p2v (_GEDR)) +#define GAFR (io_p2v (_GAFR)) + #endif /* LANGUAGE == C */ #define GPIO_MIN (0) @@ -1786,6 +1834,11 @@ #define MDCAS0 (MDCAS [0]) /* DRAM CAS shift reg. 0 */ #define MDCAS1 (MDCAS [1]) /* DRAM CAS shift reg. 1 */ #define MDCAS2 (MDCAS [2]) /* DRAM CAS shift reg. 2 */ + +#elif LANGUAGE == Assembly + +#define MDCNFG (io_p2v(_MDCNFG)) + #endif /* LANGUAGE == C */ /* SA1100 MDCNFG values */ @@ -1872,6 +1925,13 @@ ((volatile Word *) io_p2v (_MSC (0))) #define MSC0 (MSC [0]) /* Static memory Control reg. 0 */ #define MSC1 (MSC [1]) /* Static memory Control reg. 1 */ + +#elif LANGUAGE == Assembly + +#define MSC0 io_p2v(0xa0000010) +#define MSC1 io_p2v(0xa0000014) +#define MSC2 io_p2v(0xa000002c) + #endif /* LANGUAGE == C */ #define MSC_Bnk(Nb) /* static memory Bank [0..3] */ \ @@ -1982,6 +2042,10 @@ /* Memory system: */ #define MDREFR \ (*((volatile Word *) io_p2v (_MDREFR))) + +#elif LANGUAGE == Assembly + +#define MDREFR (io_p2v(_MDREFR)) #endif /* LANGUAGE == C */